TROWPROD¶
Tile Operation Diagram¶
Introduction¶
Reduce each row by multiplying across columns.
Math Interpretation¶
Let R = src.GetValidRow() and C = src.GetValidCol(). For 0 <= i < R:
Assembly Syntax¶
Synchronous form:
%dst = trowprod %src : !pto.tile<...> -> !pto.tile<...>
Lowering may introduce internal scratch tiles; the C++ intrinsic requires an explicit tmp operand.
AS Level 1 (SSA)¶
%dst = pto.trowprod %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
AS Level 2 (DPS)¶
pto.trowprod ins(%src, %tmp : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)
C++ Intrinsic¶
Declared in include/pto/common/pto_instr.hpp:
template <typename TileDataOut, typename TileDataIn, typename TileDataTmp, typename... WaitEvents>
PTO_INST RecordEvent TROWPROD(TileDataOut &dst, TileDataIn &src, TileDataTmp &tmp, WaitEvents &... events);
Constraints¶
General constraints / checks¶
dstandsrcmust both beTileType::Vec.srcmust use standard ND layout: row-major and non-fractal (BLayout::RowMajor,SLayout::NoneBox).dstmust use one of the following non-fractal layouts:- ND layout (
BLayout::RowMajor,SLayout::NoneBox), or - DN layout with exactly one column (
BLayout::ColMajor,SLayout::NoneBox,Cols == 1).
- ND layout (
dstandsrcmust use the same element type.- Runtime valid-region checks:
src.GetValidRow() != 0src.GetValidCol() != 0src.GetValidRow() == dst.GetValidRow()
- The intrinsic signature requires an explicit
tmpoperand.
A2A3 implementation checks¶
- Supported element types:
half,float,int32_t,int16_t.
A5 implementation checks¶
- Supported element types:
half,float,int32_t,int16_t. - In the currently inspected implementation path, the enforced constraints are on
srcanddst. - No extra shape/layout assertions on
tmpare enforced in the current implementation path.
Temporary Space¶
A2A3¶
tmp is used as a per-row accumulator buffer. For each row, the implementation initializes tmp with 1.0 and then multiplies blocks of src data into tmp using vmul. After all blocks are accumulated, the scalar-mode pipeline reads tmp elements and computes the final product.
tmpmust have the same element type assrc/dst.tmpsize: at least 1 row andBLOCK_BYTE_SIZE / sizeof(T)columns (i.e., 1 block: 8 elements forfloat/int32_t, 16 elements forhalf/int16_t).- A safe default: set
tmpto the same shape assrc.
A5¶
tmp is accepted by the interface but not used by the A5 implementation. The A5 backend uses vector register-based reduction (vmul + vintlv for tree reduction) and does not require scratch tile storage. tmp is retained in the C++ intrinsic signature solely for API compatibility with A2A3.
Examples¶
Auto¶
#include <pto/pto-inst.hpp>
using namespace pto;
void example_auto() {
using SrcT = Tile<TileType::Vec, float, 16, 16>;
using DstT = Tile<TileType::Vec, float, 16, 1, BLayout::ColMajor>;
using TmpT = Tile<TileType::Vec, float, 16, 16>;
SrcT src;
DstT dst;
TmpT tmp;
TROWPROD(dst, src, tmp);
}
Manual¶
#include <pto/pto-inst.hpp>
using namespace pto;
void example_manual() {
using SrcT = Tile<TileType::Vec, float, 16, 16>;
using DstT = Tile<TileType::Vec, float, 16, 1, BLayout::ColMajor>;
using TmpT = Tile<TileType::Vec, float, 16, 16>;
SrcT src;
DstT dst;
TmpT tmp;
TASSIGN(src, 0x1000);
TASSIGN(dst, 0x2000);
TASSIGN(tmp, 0x3000);
TROWPROD(dst, src, tmp);
}
ASM Form Examples¶
Auto Mode¶
# Auto mode: compiler/runtime-managed placement and scheduling.
%dst = pto.trowprod %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
Manual Mode¶
# Manual mode: resources must be bound explicitly before issuing the instruction.
# Optional for tile operands:
# pto.tassign %arg0, @tile(0x1000)
# pto.tassign %arg1, @tile(0x2000)
%dst = pto.trowprod %src, %tmp : (!pto.tile<...>, !pto.tile<...>) -> !pto.tile<...>
PTO Assembly Form¶
%dst = trowprod %src : !pto.tile<...> -> !pto.tile<...>
# AS Level 2 (DPS)
pto.trowprod ins(%src, %tmp : !pto.tile_buf<...>, !pto.tile_buf<...>) outs(%dst : !pto.tile_buf<...>)